On Wed, Oct 09, 2019 at 11:15:04AM +0200, Paolo Bonzini wrote:
> On 09/10/19 10:02, Jan Glauber wrote:
> > I'm still not sure what the actual issue is here, but could it be some bad
> > interaction between the notify_me and the list_lock? The are both 4 byte
> > and side-by-side:
> >
> > address notify_me: 0xaaaadb528aa0 sizeof notify_me: 4
> > address list_lock: 0xaaaadb528aa4 sizeof list_lock: 4
> >
> > AFAICS the generated code looks OK (all load/store exclusive done
> > with 32 bit size):
> >
> > e6c: 885ffc01 ldaxr w1, [x0]
> > e70: 11000821 add w1, w1, #0x2
> > e74: 8802fc01 stlxr w2, w1, [x0]
> >
> > ...but if I bump notify_me size to uint64_t the issue goes away.
>
> Ouch. :) Is this with or without my patch(es)?
>
> Also, what if you just add a dummy uint32_t after notify_me?
With the dummy the testcase also runs fine for 500 iterations.
Dann, can you try if this works on the Hi1620 too?
On Wed, Oct 09, 2019 at 11:15:04AM +0200, Paolo Bonzini wrote:
> On 09/10/19 10:02, Jan Glauber wrote:
> > I'm still not sure what the actual issue is here, but could it be some bad
> > interaction between the notify_me and the list_lock? The are both 4 byte
> > and side-by-side:
> >
> > address notify_me: 0xaaaadb528aa0 sizeof notify_me: 4
> > address list_lock: 0xaaaadb528aa4 sizeof list_lock: 4
> >
> > AFAICS the generated code looks OK (all load/store exclusive done
> > with 32 bit size):
> >
> > e6c: 885ffc01 ldaxr w1, [x0]
> > e70: 11000821 add w1, w1, #0x2
> > e74: 8802fc01 stlxr w2, w1, [x0]
> >
> > ...but if I bump notify_me size to uint64_t the issue goes away.
>
> Ouch. :) Is this with or without my patch(es)?
>
> Also, what if you just add a dummy uint32_t after notify_me?
With the dummy the testcase also runs fine for 500 iterations.
Dann, can you try if this works on the Hi1620 too?
--Jan