BTW: Moving the complex address to the temporary (as proposed in Comment #4) would help "atomic_compare_and_swap<dwi>_doubleword" on 32bit x86 targets, too. This pattern uses cmpxchg8b_pic_memory_operand predicate to limit the number of address registers for 32bit x86 targets, in order to avoid spill failures. Please see i386/sync.md.
(In reply to comment #11)
> Reconfirmed.
BTW: Moving the complex address to the temporary (as proposed in Comment #4) would help "atomic_ compare_ and_swap< dwi>_doubleword " on 32bit x86 targets, too. This pattern uses cmpxchg8b_ pic_memory_ operand predicate to limit the number of address registers for 32bit x86 targets, in order to avoid spill failures. Please see i386/sync.md.