These patches have been applied in a topic branch, LP1881485 of the geda-project pcb repository. The test file was moved to "tests/inputs/drctest-fullpoly_warning.pcb".
Can you explain the contents of the test file? Why the thru-holes, and why three different polys with fullpoly set?
We should also add polygons that do not have the flag set, to demonstrate that they are not flagged.
In preparation for some future work, I'd like to move this check to a separate function, and call that from the main DRC function instead of embedding it directly into the main function. Eventually, there will be a list of DRC items that can be enabled or disabled by preferences.
Thanks for the patches, sorry for the slow progress.
--Chad
Hi Britton-
These patches have been applied in a topic branch, LP1881485 of the geda-project pcb repository. The test file was moved to "tests/ inputs/ drctest- fullpoly_ warning. pcb".
Can you explain the contents of the test file? Why the thru-holes, and why three different polys with fullpoly set?
We should also add polygons that do not have the flag set, to demonstrate that they are not flagged.
In preparation for some future work, I'd like to move this check to a separate function, and call that from the main DRC function instead of embedding it directly into the main function. Eventually, there will be a list of DRC items that can be enabled or disabled by preferences.
Thanks for the patches, sorry for the slow progress.
--Chad