As of version 4.2.0 my PCB layout has 176 new DRC errors. I have many pads which are connected to polys by setting the pad clearance to zero. The DRC previously ignored theses. I understand that this looks like a legitimate clearance violation but there is no way, as far as I can tell, to tell PCB that the connection from the pad to the poly is intentional. A flag on the pad indicating that it should be connected such as "pininpoly" would be ideal.
The "clearline" flag on lines is related. If there were a "noclear" flag for pads, I could add this to all the pads that were intentionally connected to the poly. Ideally, "noclear" would both prevent the DRC from calling the connection an error *and* cause the poly router to ignore the pad clearance setting.
This is fairly easy to reproduce.
1. Start a new project
2. Add a poly rectangle on the top layer.
3. Add a component that has a pad.
4. Set the clearance of a pad to zero (Shift-K).
5. Run the DRC.
As of version 4.2.0 my PCB layout has 176 new DRC errors. I have many pads which are connected to polys by setting the pad clearance to zero. The DRC previously ignored theses. I understand that this looks like a legitimate clearance violation but there is no way, as far as I can tell, to tell PCB that the connection from the pad to the poly is intentional. A flag on the pad indicating that it should be connected such as "pininpoly" would be ideal.
The "clearline" flag on lines is related. If there were a "noclear" flag for pads, I could add this to all the pads that were intentionally connected to the poly. Ideally, "noclear" would both prevent the DRC from calling the connection an error *and* cause the poly router to ignore the pad clearance setting.
This is fairly easy to reproduce.
1. Start a new project
2. Add a poly rectangle on the top layer.
3. Add a component that has a pad.
4. Set the clearance of a pad to zero (Shift-K).
5. Run the DRC.
See attached file.