pcb

DRC on a per layer basis.

Bug #700408 reported by Bert Timmerman
2
Affects Status Importance Assigned to Milestone
gEDA project
New
Wishlist
Unassigned
pcb
New
Wishlist
Unassigned
pcb future-bug-fix-release

Bug Description

This bug report supersedes a part of the multiple feature requests in bug report #699559 "Wishlist".

It should be possible to define design rules for each of
the element types and layers. For example it should
possible to turn off design checking for silk-screen
layers.

Tags: drc
Peter Clifton (pcjc2)
tags: added: drc
Revision history for this message
Ineiev (ineiev) wrote :

(something like in http://repo.or.cz/w/geda-pcb/dti.git/shortlog/refs/heads/per-layer.drc)

Traumflug (mah-jump-ing)
Changed in geda-project:
importance: Undecided → Wishlist
Bert Timmerman (bert-timmerman)
no longer affects: pcb
affects: geda-project → pcb
Revision history for this message
Traumflug (mah-jump-ing) wrote :

Please keep your fingers off of geda-project unless you want to contribute to it.

Changed in geda-project:
importance: Undecided → Wishlist
Chad Parker (parker-charles)
Changed in pcb:
milestone: none → future-bug-fix-release
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