lunar/linux-riscv: 6.1.0-1001.1 -proposed tracker
Affects | Status | Importance | Assigned to | Milestone | ||
---|---|---|---|---|---|---|
Kernel SRU Workflow |
Invalid
|
Medium
|
Unassigned | |||
Automated-testing |
Invalid
|
Medium
|
Unassigned | |||
Boot-testing |
New
|
Medium
|
Unassigned | |||
New-review |
Invalid
|
Medium
|
Andy Whitcroft | |||
Prepare-package |
In Progress
|
Medium
|
Paolo Pisati | |||
Prepare-package-meta |
In Progress
|
Medium
|
Paolo Pisati | |||
Promote-signing-to-proposed |
Invalid
|
Medium
|
Unassigned | |||
Promote-to-proposed |
New
|
Medium
|
Canonical Kernel Team | |||
Promote-to-release |
New
|
Medium
|
Ubuntu Package Archive Administrators | |||
Regression-testing |
New
|
Medium
|
Canonical Kernel Team | |||
Signing-signoff |
New
|
Undecided
|
Unassigned | |||
Sru-review |
Fix Released
|
Medium
|
Andy Whitcroft | |||
linux-riscv (Ubuntu) | ||||||
Lunar |
Fix Released
|
Medium
|
Unassigned |
Bug Description
This bug will contain status and test results related to a kernel source (or snap) as stated in the title.
For an explanation of the tasks and the associated workflow see:
https:/
-- swm properties --
built:
from: 5f821568e00ef676
route-entry: 1
delta:
promote-
flag:
bugs-respammed: true
kernel-
packages:
main: linux-riscv
meta: linux-meta-riscv
phase: Packaging
phase-changed: Friday, 02. December 2022 11:56 UTC
reason:
:prepare-
new-review: Stalled -s ready for review
prepare-package: Stalled -- package not uploaded
prepare-
variant: debs
versions:
main: 6.1.0-1001.1
meta: 6.1.0.1001.1
~~:
clamps:
new-review: 5f821568e00ef676
self: 6.1.0-1001.1
sru-review: 5f821568e00ef676
tags: | added: kernel-release-tracking-bug-live |
description: | updated |
tags: | added: kernel-sru-cycle-d2022.11.28-1 |
description: | updated |
tags: | added: kernel-sru-derivative-of-1998078 |
Changed in kernel-sru-workflow: | |
status: | New → Confirmed |
importance: | Undecided → Medium |
Changed in linux-riscv (Ubuntu Lunar): | |
importance: | Undecided → Medium |
Changed in kernel-sru-workflow: | |
status: | Confirmed → Triaged |
description: | updated |
Changed in kernel-sru-workflow: | |
status: | Triaged → In Progress |
summary: |
- lunar/linux-riscv: <version to be filled> -proposed tracker + lunar/linux-riscv: 6.1.0-1001.1 -proposed tracker |
description: | updated |
description: | updated |
description: | updated |
description: | updated |
description: | updated |
description: | updated |
description: | updated |
description: | updated |
description: | updated |
description: | updated |
tags: | added: kernel-block-ppa |
description: | updated |
description: | updated |
description: | updated |
description: | updated |
Changed in kernel-sru-workflow: | |
status: | In Progress → Invalid |
This bug was fixed in the package linux-riscv - 6.2.0-19.19.1
---------------
linux-riscv (6.2.0-19.19.1) lunar; urgency=medium
* lunar/linux-riscv: 6.2.0-19.19.1 -proposed tracker (LP: #2013348)
* Enable StarFive VisionFive 2 board (LP: #2013232) link_change_ notify( ) jh7100. h to clk-starfive- jh71x0. h controller: Add StarFive JH7110 plic
- net: phy: motorcomm: change the phy id of yt8521 and yt8531s to lowercase
- dt-bindings: net: Add Motorcomm yt8xxx ethernet phy
- net: phy: Add BIT macro for Motorcomm yt8521/yt8531 gigabit ethernet phy
- net: phy: Add dts support for Motorcomm yt8521 gigabit ethernet phy
- net: phy: Add dts support for Motorcomm yt8531s gigabit ethernet phy
- net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy
- net: phy: motorcomm: uninitialized variables in yt8531_
- dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl
- dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl
- pinctrl: starfive: Add StarFive JH7110 sys controller driver
- pinctrl: starfive: Add StarFive JH7110 aon controller driver
- dt-bindings: mmc: Add StarFive MMC module
- mmc: starfive: Add sdio/emmc driver support
- dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board
- dt-bindings: riscv: correct starfive visionfive 2 compatibles
- dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
- soc: sifive: ccache: Add StarFive JH7110 support
- RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols
- SAUCE: clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
- SAUCE: clk: starfive: Factor out common JH7100 and JH7110 code
- SAUCE: clk: starfive: Rename clk-starfive-
- SAUCE: clk: starfive: Rename "jh7100" to "jh71x0" for the common code
- SAUCE: reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE
- SAUCE: reset: Create subdirectory for StarFive drivers
- SAUCE: reset: starfive: Factor out common JH71X0 reset code
- SAUCE: reset: starfive: Extract the common JH71X0 reset code
- SAUCE: reset: starfive: Rename "jh7100" to "jh71x0" for the common code
- SAUCE: reset: starfive: jh71x0: Use 32bit I/O on 32bit registers
- SAUCE: dt-bindings: clock: Add StarFive JH7110 system clock and reset
generator
- SAUCE: dt-bindings: clock: Add StarFive JH7110 always-on clock and reset
generator
- SAUCE: clk: starfive: Add StarFive JH7110 system clock driver
- SAUCE: clk: starfive: Add StarFive JH7110 always-on clock driver
- SAUCE: reset: starfive: Add StarFive JH7110 reset driver
- SAUCE: dt-bindings: timer: Add StarFive JH7110 clint
- SAUCE: dt-bindings: interrupt-
- SAUCE: dt-bindings: riscv: Add SiFive S7 compatible
- SAUCE: riscv: dts: starfive: Add initial StarFive JH7110 device tree
- SAUCE: riscv: dts: starfive: Add StarFive JH7110 pin function definitions
- SAUCE: riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device
tree
- SAUCE: dt-bindings: syscon: Add StarFive syscon doc
- SAUCE: mmc: starfive: Add initialization of prev_err
- SAUCE: riscv: dts: starfive: Add mmc node
- SAUCE: dt-bindings: net: snps,dwmac: Add dw...