can't insert element if name runs off edge

Bug #699578 reported by whitis
6
This bug affects 1 person
Affects Status Importance Assigned to Milestone
gEDA project
New
Wishlist
Unassigned
pcb
New
Wishlist
Unassigned

Bug Description

You can't insert an element where the refdes would run off the edge of the board (i.e. x or y < 0).

I have a bunch of symbols where the default refdes is the same as the footprint name. And the footprint names can be very long:
   header_2.54mm_2x13_male_vert_ribbonshroud
   TSQFP50P30X30-208N-BJB
The second name is IPC-7351 compliant.

PCB should not prevent the component from because the refdes runs negative. Those will eventually be edited to shorter text.
Actually, PCB should allow any part of the component to run off the edge of the board.
The board dimensions should only affect the outline.
You need to run components off the edge of the board before they are placed and during some editing operations. In fact, I tell the program the board size is twice the actual board size in both X and Y just so I have room for unplaced components. But I can't place components off the left or top sides of the board. But it would be helpful if you could because of rats nest lines. You want to place the component off the edge but near the final location.

Not to mention that people might have other ideas about where (0,0) is than the upper left hand side of the board. If you have a spec on placement of certain components where dimensions are relative to, for example, pin 1 on J1, then you want 0,0 to be pin 1 on J1, not the upper left.

Revision history for this message
Ineiev (ineiev) wrote :

Actually this is rather a feature request.

Generally speaking, a board outline is not a rectangle. one can create another layer for the outline, though this
layer won't come to fab gerbers. I think flexibility of coordinates origin is not so essential.

Revision history for this message
Ineiev (ineiev) wrote :

Hm. from http://geda.seul.org/wiki/geda:pcb_tips

"You can add an outline layer to your pcb projects. PCB interprets any layer called ‘outline’ (edit –> edit name of –> active layer) as though it is the absolute edge of the pcb. PCB prints gerber files that rigidly represent this."

Maybe a snapshot of these pages worth being included to the PCB distribution?

Revision history for this message
DJ Delorie (djdelorie) wrote :

Right, it's intentional that PCB doesn't let you put stuff off the board, including silk.

Moving to feature request tracker for "add an option to allow silk off the board"

Traumflug (mah-jump-ing)
Changed in geda-project:
importance: Undecided → Wishlist
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