peephole optimisation misses obvious uxtb removal
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
GNU Arm Embedded Toolchain |
Confirmed
|
Undecided
|
Unassigned |
Bug Description
armv6 target
The arrays are byte arrays so are written to with strb. The code does have & 0xFF which the optimiser should remove.
C code :
static uint8_t * ram;
static uint8_t * Memory;
void ram_emulator_
{
uint8_t data = gpio & 0xFF;
ram[ram_addr] = data;
Memory[3] = data;
}
Code produced by gcc version 7.3.1 20180622
01f01af4 <ram_emulator_
1f01af4: e59f201c ldr r2, [pc, #28] ; 1f01b18 <ram_emulator_
1f01af8: e59f301c ldr r3, [pc, #28] ; 1f01b1c <ram_emulator_
1f01afc: e5921000 ldr r1, [r2]
1f01b00: e5932000 ldr r2, [r3]
1f01b04: e59f3014 ldr r3, [pc, #20] ; 1f01b20 <ram_emulator_
1f01b08: e6ef0070 uxtb r0, r0
1f01b0c: e7c10002 strb r0, [r1, r2]
1f01b10: e5c30003 strb r0, [r3, #3]
1f01b14: e12fff1e bx lr
1f01b18: 01f1cc34 mvnseq ip, r4, lsr ip
1f01b1c: 01f1cc38 mvnseq ip, r8, lsr ip
1f01b20: 01f1e164 mvnseq lr, r4, ror #2
looking at the code in more detail the first two ldrs could be also be be peepholed to ldrd
The testcase is not compilable and there is no input on the options that are required to provoke this code generation.
Modifying the testcase to
#include <stdint.h>
static uint8_t * ram;
static uint8_t * Memory;
unsigned int ram_addr;
void ram_emulator_ byte_write( unsigned int gpio)
{
uint8_t data = gpio & 0xFF;
ram[ram_addr] = data;
Memory[3] = data;
}
with a recent gcc 7 and using -O2 -march=armv6 produces
am_emulator_ byte_write:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r2, .L3
mov r3, #0
ldr r2, [r2]
strb r0, [r2]
strb r3, [r3, #3]
.inst 0xe7f000f0
.L4:
.align 2
.L3:
.word ram_addr
At this point I am speculating about code generated as the example is incomplete.