GNU Arm Embedded Toolchain

gnu assembler have wrong output on VCVTR

Bug #1619906 reported by banxian on 2016-09-03

This bug affects 1 person

Affects		Status	Importance	Assigned to	Milestone
	GNU Arm Embedded Toolchain	Confirmed	Low	Przemyslaw Wirkus

Bug Description

this is a bug related to binutils in gcc arm toolchain.
toolchain version: 2016q3 5.4
assembler version: GNU assembler version 2.26.0 (arm-none-eabi) using BFD version (GNU Tools for ARM Embedded Processors) 2.26.0.20160616
assembler options: -march=armv7e-m -mthumb -mfloat-abi=hard -mfpu=neon -meabi=5 -k -v

for eg,
VCVTR.U32.F32 S0, S16 // .byte 0xBC, 0xEE, 0xC8, 0x0A
will treat as VCVT.U32.F32 S0, S16 (BC EE 48 0A) by assembler.

VCVTR is rouneded version and bit7 in A1/T1 encoding should be set.
you can see
A8.8.306 VCVT, VCVTR (between floating-point and integer, Floating-point)
for details.

the sourcecode testVFP.s which can reproduce this problem is attached.

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banxian (azsd) wrote on 2016-09-03:

testVFP.s Edit (147 bytes, text/plain)

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banxian (azsd) wrote on 2016-09-03:

sorry, the bit7 is an ommit flag and my IDA Pro give me wrong disassembly output.

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banxian (azsd) wrote on 2016-09-03:

let me find a new bug on same thread.
change testVFP.s to
.syntax unified

.code 16
VCVT.F32.U32 S16, S0 // ok
VCVTR.F32.U32 S16, S0 // invalid

the second VCVTR.F32.U32 have wrong syntax but passed assemble.

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Andre Vieira (andre-simoesdiasvieira) wrote on 2016-09-05:

Hi baxian,

I am not able to reproduce your issue. Assuming you meant you are using our 2016q2 (and not q3, since that has not been released yet), this is what I got:

$ cat t.s
.syntax unified
.code 16
VCVT.F32.U32 S16, S0
VCTR.F32.U32 S16, S0
$ arm-none-eabi-as -march=armv7e-m -mthumb -mfloat-abi=hard -mfpu=neon -meabi=5 -k -v t.s
GNU assembler version 2.26.0 (arm-none-eabi) using BFD version (GNU Tools for ARM Embedded Processors) 2.26.0.20160616
t.s: Assembler messages:
t.s:4: Error: bad instruction `vctr.f32.u32 S16,S0'

version seems the same... I wonder what is going on. Could you provide us more information about your system?

Cheers,
Andre

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banxian (azsd) wrote on 2016-09-06:

t.s Edit (102 bytes, text/plain)

you have typo in your t.s. not vctr but VCVTR.

because no rounding special version from int to float, so the R suffix does not present for F32.U32/F32.S32 in both instruction set/UAL.

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Thomas Preud'homme (thomas-preudhomme) wrote on 2016-09-06:

I can reproduce the issue indeed.

Changed in gcc-arm-embedded:
status:	New → Confirmed

Thomas Preud'homme (thomas-preudhomme) on 2016-09-06

Changed in gcc-arm-embedded:
importance:	Undecided → Low

Revision history for this message

Thomas Preud'homme (thomas-preudhomme) wrote on 2016-09-06:

Marked the importance as low because it does not generate wrong code and does not render the instruction unusable. It only accepts some syntax which are not legal but generate code in an expected way (ie. in this example generates a vcvtr.f32.s32).

Joey Ye (jinyun-ye) on 2020-02-26