GR restart flag bit position is incorrect

Bug #1682310 reported by Ananth Suryanarayana
6
This bug affects 1 person
Affects Status Importance Assigned to Milestone
Juniper Openstack
Status tracked in Trunk
R3.2
Fix Committed
Undecided
Ananth Suryanarayana
Trunk
Fix Committed
Undecided
Ananth Suryanarayana

Bug Description

In GR, restart-bit is bit 0 (MSB) in the 16 bits flags+time field of the GR capability. Code uses bit 12, LSB of the 4 bits flags instead... this is a reserved bit, not the restart bit.

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : [Review update] R3.2

Review in progress for https://review.opencontrail.org/30376
Submitter: Ananth Suryanarayana (<email address hidden>)

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : [Review update] master

Review in progress for https://review.opencontrail.org/30377
Submitter: Ananth Suryanarayana (<email address hidden>)

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : [Review update] R3.2

Review in progress for https://review.opencontrail.org/30376
Submitter: Ananth Suryanarayana (<email address hidden>)

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : [Review update] master

Review in progress for https://review.opencontrail.org/30377
Submitter: Ananth Suryanarayana (<email address hidden>)

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : [Review update] R3.2

Review in progress for https://review.opencontrail.org/30376
Submitter: Ananth Suryanarayana (<email address hidden>)

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : [Review update] master

Review in progress for https://review.opencontrail.org/30377
Submitter: Ananth Suryanarayana (<email address hidden>)

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : [Review update] R3.2

Review in progress for https://review.opencontrail.org/30604
Submitter: Ananth Suryanarayana (<email address hidden>)

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : A change has been merged

Reviewed: https://review.opencontrail.org/30377
Committed: http://github.com/Juniper/contrail-controller/commit/a0d7d8ccc528f8f26a177fdc2f3a693d3371d90b
Submitter: Zuul (<email address hidden>)
Branch: master

commit a0d7d8ccc528f8f26a177fdc2f3a693d3371d90b
Author: Ananth Suryanarayana <email address hidden>
Date: Wed Apr 19 16:14:17 2017 -0700

Set GR restart bit at the correct position (16th, the msb bit)

Currently, code used to set the 12th bit, which is a reserved bit
in the GR 4-bit flags field

Add unit tests to check the GR flags restart-bit sets and resets

Change-Id: I3ddf119b1345d80c9a1353950f9aa9438a9839ef
Closes-Bug: 1682310

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : [Review update] R3.2

Review in progress for https://review.opencontrail.org/30604
Submitter: Ananth Suryanarayana (<email address hidden>)

Revision history for this message
OpenContrail Admin (ci-admin-f) wrote : A change has been merged

Reviewed: https://review.opencontrail.org/30604
Committed: http://github.com/Juniper/contrail-controller/commit/cfb3450401cf048c744ae527b888be7655a70097
Submitter: Zuul (<email address hidden>)
Branch: R3.2

commit cfb3450401cf048c744ae527b888be7655a70097
Author: Ananth Suryanarayana <email address hidden>
Date: Wed Apr 19 16:14:17 2017 -0700

Set GR restart bit at the correct position (16th, the msb bit)

Currently, code used to set the 12th bit, which is a reserved bit
in the GR 4-bit flags field

Add unit tests to check the GR flags restart-bit sets and resets

Change-Id: I3ddf119b1345d80c9a1353950f9aa9438a9839ef
Closes-Bug: 1682310

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