gnu assembler can't deal with AL condition code in itblock

Bug #1620025 reported by banxian
12
This bug affects 2 people
Affects Status Importance Assigned to Milestone
GNU Arm Embedded Toolchain
In Progress
Low
Przemyslaw Wirkus

Bug Description

toolchain version: 2016q3 5.4
assembler version: GNU assembler version 2.26.0 (arm-none-eabi) using BFD version (GNU Tools for ARM Embedded Processors) 2.26.0.20160616
assembler options: -march=armv7e-m -mthumb -mfloat-abi=hard -mfpu=neon -meabi=5 -k -v

example code:
 .syntax unified

 .code 16
 ITTTT al
 ORRAL R2, R5
 LSRAL R0, R4
 ORRAL R0, R7
 LSRAL R1, R4

tested with apple clang shipping with xcode 5.1.1
clang -arch armv7 -c -o itblockclang.o itblock.s
same code can build in IAR EWARM 7.30:

        SECTION `.text`:CODE:NOROOT(1)
        THUMB

 ITTTT al // .byte 0xE1, 0xBF
 ORRAL R2, R5 // .byte 0x2A, 0x43
 LSRAL R0, R4 // .byte 0xE0, 0x40
 ORRAL R0, R7 // .byte 0x38, 0x43
 LSRAL R1, R4 // .byte 0xE1, 0x40

        END

but gnu as failed to compile and output such error:
itblock.s: Assembler messages:
itblock.s:5: Error: instruction not allowed in IT block -- `orral R2,R5'
itblock.s:6: Error: instruction not allowed in IT block -- `lsral R0,R4'
itblock.s:7: Error: instruction not allowed in IT block -- `orral R0,R7'
itblock.s:8: Error: instruction not allowed in IT block -- `lsral R1,R4'

Revision history for this message
Andre Vieira (andre-simoesdiasvieira) wrote :

Hello Banxian,

We are aware of this limitation. Unfortunately, we have not yet got around to fixing it. For the time being we suggest you use the .insn directive, so for your code:

.inst 0xbfe1
.inst 0x432a
.inst 0x40e0
.inst 0x4338
.inst 0x40e1

Kind Regards,
Andre

Changed in gcc-arm-embedded:
status: New → Confirmed
importance: Undecided → Low
Changed in gcc-arm-embedded:
status: Confirmed → In Progress
Revision history for this message
Dan Lewis (danielwlewis) wrote :

Here's why I'd like to see this bug fixed: The code below computes a quadratic. Using condition code AL in the IT block reduces the number of instruction bytes by almost 40%.

// 16 instruction bytes
MUL R1,R1,R0 // ax
ADD R1,R1,R2 // ax+b
MUL R0,R0,R1 // (ax+b)x
ADD R0,R0,R3 // (ax+b)x+c

// 10 bytes
ITTTT AL
MULAL R1,R1,R0
ADDAL R1,R1,R2
MULAL R0,R0,R1
ADDAL R0,R0,R3

Thanks!
Dan

Changed in gcc-arm-embedded:
assignee: nobody → Przemyslaw Wirkus (wirkus)
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